Design and Implementation of a Superscalar Microprocessor
Superscalar processors are machines that are designed to fetch and issue multiple instructions every clock cycle. This paper discusses the complexity in the transition from non-pipelined processors to pipelined processors and the transition from pipelined processors to superscalar processors. We begin with the discussion of an implementation of a non-pipelined processor. Secondly, we discuss the process of converting it into a pipelined processor. Finally, we provide the design details of all the phases of a superscalar processor, including the performance improvement achieved by these transitions.
superscalar, pipeline, design flow, LC-3b